The imaging process used herein is described, with respect to a fluid jet assisted ion projection printer, in commonly assigned U.S. Pat. No. 4,463,363. In the printer described in that patent, imaging ions are first generated and then deposited upon a moving receptor by means of a linear array of selectively controllable, closely spaced, minute air nozzles. The ions of a single polarity, preferably, positive are generated in an ionization chamber by a high voltage corona discharge and then are transported, by being entrained in a high velocity fluid, to and through the nozzles wherein they are electrically controlled by an electric potential applied to modulating electrodes. Selective application of control voltages to the modulating electrodes in the array will establish a field across the nozzle to inhibit passage of ions to each nozzle. Alternatively, ions are allowed to pass through the nozzle if the field is below a threshold value, so as to enable areas of charge to appear on the receptor surface for subsequent development.
A typical modulating structure for this type of printer is disclosed in commonly assigned to U.S. Pat. No. 4,524,371. The modulating structure is formed upon a planar marking head mounted on the ion generating housing, and each electrode thereon may be addressed individually for modulating each nozzle independently. An improved integrated printer marking head, incorporating thin film ion modulating electrodes, drive circuitry, and switching elements formed upon a single substrate is disclosed in commonly assigned U.S. Pat. No. 4,584,592. The printers described in the above-named patent rely upon the selective imposition of electrical data on the modulation electrodes. The data may be computer generated and is normally applied by any conventional data and address technique. In yet another commonly assigned U.S. Pat. No. 4,591,885, the principle of the fluid jet assisted ion projection marking process is incorporated in an apparatus for copying original images onto an image receptor. This is accomplished by causing an optical input to address a photoconductive modulation assembly formed at one end of a light collecting ribbon.
Other patents of interest are U.S. Pat. No. 4,392,131 disclosing an integrable activation module for passive electro optical displays. The module comprises a shift register for supplying data in parallel to a display matrix and a pulse generator for supplying pulses to row and column drivers in response to a signal from a transfer terminal to thereby address an n by m matrix. U.S. Pat. No. 4,247,856 discloses a sequentially scanned plasma display for alpha numeric characters comprising a clock for driving a shift register for controlling the columns of a plasma display. Data is supplied to the display from a controllable logic circuit and displayed column by successive column. U.S. Pat. No. 4,180,813 discloses a liquid crystal display device using a digital converter comprising a liquid crystal display panel receiving data in parallel from a shift register and receiving driving voltages from a scanning electrode circuit for energizing electrodes each time a ring counter receives a control signal.
A difficulty with the prior art systems is that the means to translate high speed serial (video) data into real time multiplexed parallel applied data patterns to drive a marker or printer is often complex and costly. It would be desirable to provide a low cost, high speed, VLSI based serial to multiplexed data translator for printer applications. It is an object, therefore, of the present invention to provide an interface between high speed serial data and output data patterns for a high resolution output modulation device that is simple and economical. It is another object of the present invention to provide a high speed, two wire serial interface between a circuit designed to drive a raster scan device and the x-y matrixed input of the discrete pixel modulated output devices. It is also an object to provide a low cost input voltage isolation. It is still another object of the present invention to provide a simple VLSI interface requiring only two VLSI shift registers and a simple digital divider and latch control circuitry.